SENTHICOM - SENse THInk COMmunicate

Region

national

Partners

7 partners

Phase

Ongoing

Start

Jan 01, 2026

End

No end date

Project Journey & Timeline

Today is Oct 21, 2026

In Progress

Start: Jan 1, 2026End: Open-ended

Active development underway. Today (Oct 21, 2026) marks current execution.

293 days elapsed

Project Kickoff

Jan 1, 2026Project Kickoff

Official launch of project research activities.

Start

Jan 1, 2026Completed

Current PositionOct 21, 2026

Active project execution in progress.

End

Dec 31, 2028Upcoming

Continuous Operations

OngoingIn Progress

Active ongoing research with an open-ended delivery roadmap.

Abstract

UTCN will develop an efficient modeling, simulation, and validation environment, as well as augmented applications associated with the processors created by NXP within the IPCEI framework — the first 5nm automotive processor that safely 'super-integrates' dozens of different critical functions within the vehicle and the most advanced processing platform for the next generation of 4D radar solutions.

The scope of the SENTHICOM project is to develop breakthrough NXP products (mainly focused on SoC and associated software) in the area of Radar (aligned with WS Sense), Automotive (aligned with WS Think), and 5G/B5G/6G (aligned with WS Communicate). For each product, NXP Romania team will research, develop and innovate, together with the HW design teams in other NXP sites or with partner R&D teams, the design of the domain-specific HW accelerators and the associated firmware, drivers and middleware such that customers can focus their efforts on creating value based on their own domain expertise. The domain-specific HW accelerators allow to reduce the power consumption of the final SoC while delivering the functionality and performance required in each of the respective domains, thus being an important part of advanced silicon design.

Activities

A.1 Research on efficient multi-physics modeling, testing, and physical validation of integrated systems.

A.2 Research on innovative methods of HW-SW Co-Design with hardware accelerators, virtualization and digital twin concepts for research and development of innovative microelectronics products.

A.3 Research on analysis and optimized design methodologies, as well as for the development of new topologies and implementation solutions for PMICs based on analog and digital techniques, capable of powering high-performance digital systems in the automotive industry.

A.4 Research on methodologies and circuit solutions for minimizing the effects of inherent non-idealities in nanometric technologies on the performance of circuits intended for generating clock signals in integrated digital systems.

A.5 Optimization of routes and traffic security in next-generation networks for vehicle-to-network (V2N) communication,

A.6 Integrated hardware and software solutions optimized for AI/ML, security, and energy efficiency, including specialized accelerators, post-quantum cryptography, and secure communication systems.

Research Domains

Microelectronics